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INTEGRATED CIRCUITS
DATA SHEET
UMA1019AM Low-voltage frequency synthesizer for radio telephones
Product specification Supersedes data of November 1994 File under Integrated Circuits, IC03 1995 Jul 07
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
FEATURES * Low current from 3 V supply * Fully programmable RF divider * 3-line serial interface bus * Independent fully programmable reference divider, driven from external crystal oscillator * Dual phase detector outputs to allow fast frequency switching * Dual power-down modes. APPLICATIONS * 1 to 1.7 GHz mobile telephones * Portable battery-powered radio equipment. GENERAL DESCRIPTION The UMA1019AM BICMOS device integrates prescalers, a programmable divider, and phase comparator to implement a phase-locked loop. QUICK REFERENCE DATA SYMBOL VCC, VDD ICC + IDD ICCPD, IDDPD fVCO fxtal fPC Tamb PARAMETER supply voltage supply current current in power-down mode per supply RF input frequency crystal reference input frequency phase comparator frequency operating ambient temperature CONDITIONS VCC VDD MIN. 2.7 - - 1000 3 - -30
UMA1019AM
The device is designed to operate from 3 NiCd cells, in pocket phones, with low current and nominal 5 V supplies. The synthesizer operates at RF input frequencies up to 1.7 GHz. The synthesizer has a fully programmable reference divider. All divider ratios are supplied via a 3-wire serial programming bus. Separate power and ground pins are provided to the analog and digital circuits. The ground leads should be externally short-circuited to prevent large currents flowing across the die and thus causing damage. Digital supplies VDD1, VDD2 and VDD3 must also be at the same potential. VCC must be equal to or greater than VDD (i.e. VDD = 3 V and VCC = 5 V for wider tuning range). The phase detector uses two charge pumps, one provides normal loop feedback, while the other is only active during fast mode to speed-up switching. All charge pump currents (gain) are fixed by an external resistance at pin ISET (pin 14). Only passive loop filters are used; the charge-pumps function within a wide voltage compliance range to improve the overall system performance.
TYP. - 9.4 12 1500 - 200 -
MAX. 5.5 - - 1700 40 - +85
UNIT V mA A MHz MHz kHz C
ORDERING INFORMATION PACKAGE TYPE NUMBER NAME UMA1019AM SSOP20 DESCRIPTION plastic shrink small outline package; 20 leads; body width 4.4 mm VERSION SOT266-1
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Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
BLOCK DIAGRAM
UMA1019AM
Fig.1 Block diagram.
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Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
PINNING SYMBOL FAST CPF CP VDD1 VDD2 RFI DGND1 fXTAL POFF n.c. CLK DATA E ISET n.c. AGND n.c. VCC VDD3 LOCK PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DESCRIPTION control input to speed-up main synthesizer speed-up charge-pump output normal charge-pump output digital power supply 1 digital power supply 2 1.7 GHz RF main divider input digital ground 1 crystal frequency input from TCXO power-down input not connected programming bus clock input programming bus data input programming bus enable input (active LOW) regulator pin to set the charge-pump currents not connected analog ground not connected supply for charge-pump digital power supply 3 in-lock detect output; test mode output
UMA1019AM
Fig.2 Pin configuration.
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Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
FUNCTIONAL DESCRIPTION General Programmable reference and main dividers drive the phase detector. Two charge pumps produce phase error current pulses for integration in an external loop filter. A hardwired power-down input POFF (pin 9) ensures that the dividers and phase comparator circuits can be disabled. The RFI input (pin 6) drives a pre-amplifier to provide the clock to the first divider stage. The pre-amplifier has a high input impedance, dominated by pin and pad capacitance. The circuit operates with signal levels from 100 mV up to 500 mV (RMS), and at frequencies as high as 1.7 GHz. The high frequency divider circuits use bipolar transistors, slower bits are CMOS. Divider ratios (512 to 131 071) allow up to 2 MHz phase comparison frequency. The reference and main divider outputs are connected to a phase/frequency detector that controls two charge pumps. The two pumps have a common bias-setting current that is set by an external resistance. The ratio between currents in fast and normal operating modes can be programmed via the 3-wire serial bus. The low current pump remains active except in power-down. The high current pump is enabled via the control input FAST (pin 1). By appropriate connection to the loop filter, dual bandwidth loops are provided: short time constant during frequency switching (FAST mode) to speed-up channel changes and low bandwidth in the settled state (on-frequency) to reduce noise and breakthrough levels. The synthesizer speed-up charge pump (CPF) is controlled by the FAST input in synchronization with phase detector operation in such a way that potential disturbances are minimized. The dead zone (caused by finite time taken to switch the current sources on or off) is cancelled by feedback from the normal pump output to the phase detector improving linearity. An open drain transistor drives the output pin LOCK (pin 20). It is recommended that the pull-up resistor from this pin to VDD is chosen to be of sufficient value to keep the sink current in the LOW state to below 400 A. The output will be a current pulse with the duration of the selected phase error. By appropriate external filtering and threshold comparison an out-of-lock or an in-lock flag is generated. The out-of-lock function can be disabled via the serial bus. Serial programming bus
UMA1019AM
A simple 3-line unidirectional serial bus is used to program the circuit. The 3 lines are DATA, CLK and E (enable). The data sent to the device is loaded in bursts framed by E. Programming clock edges and their appropriate data bits are ignored until E goes active LOW. The programmed information is loaded into the addressed latch when E returns inactive HIGH. Only the last 21 bits serially clocked into the device are retained within the programming register. Additional leading bits are ignored, and no check is made on the number of clock pulses. The fully static CMOS design uses virtually no current when the bus is inactive. It can always capture new programmed data even during power-down. However when the synthesizer is powered-on, the presence of a TCXO signal is required at pin 8 (fXTAL) for correct programming. Data format Data is entered with the most significant bit first. The leading bits make up the data field, while the trailing four bits are an address field. The UMA1019AM uses 4 of the 16 available addresses. The data format is shown in Table 1. The first entered bit is p1, the last bit is p21. The trailing address bits are decoded on the inactive edge of E. This produces an internal load pulse to store the data in one of the addressed latches. To ensure that data is correctly loaded at first power-up, E should be held LOW and only taken HIGH after an appropriate register has been programmed. To avoid erroneous divider ratios, the pulse is not allowed during data reads by the frequency dividers. This condition is guaranteed by respecting a minimum E pulse width after data transfer. The corresponding relationship between data fields and addresses is given in Table 2. Power-down mode The power-down signal can be either hardware (POFF) or software (sPOFF). The dividers are on when both POFF and sPOFF are at logic 0. When the synthesizer is reactivated after power-down the main and reference dividers are synchronized to avoid possibility of random phase errors on power-up.
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Philips Semiconductors
Table 1 Format of programmed data
Low-voltage frequency synthesizer for radio telephones
LAST IN p21 ADD0 p20 ADD1 p19 ADD2
PROGRAMMING REGISTER BIT USAGE p18 ADD3 p17 DATA0 LSB p16 DATA1 ../.. ../.. DATA COEFFICIENT p2 DATA15
FIRST IN p1 DATA16 MSB
LATCH ADDRESS Table 2 Bit allocation (note 1) FT p1 dt16 X PM16 X Notes X X X X X p2 dt15 X p3 dt14 X p4 dt13 X p5 dt12 OOL X CR1 PR10 CR0 p6 p7 p8
REGISTER ALLOCATION p9 p10 p11 p12 p13 p14 dt4 sPOFF X X dt3 X p15 dt2 X p16 p17 dt1 X dt0 0 X PM0 PR0 0 0 0 p18 p19 0 0 1 1 p20 0 0 0 0 DATA FIELD TEST BITS(2) X X MAIN DIVIDER COEFFICIENT REFERENCE DIVIDER COEFFICIENT ADDRESS
LT p21 0 1 0 1
1. FT = first, LT = last; sPOFF = software power-down for synthesizer (1 = OFF); OOL = out-of-lock (1 = enabled). 2. The test register should not be programmed with any other values except all zeros for normal operation. Table 3 Fast and normal charge pumps current ratio (note 1) CR1 0 0 1 1 Note V 14 1. ISET = ---------- ; bias current for charge pumps. R ext CR0 0 1 0 1 ICP 4 x ISET 4 x ISET 2 x ISET 2 x ISET ICPF 16 x ISET 32 x ISET 24 x ISET 32 x ISET ICPF : ICP 4:1 8:1 12 : 1 16 : 1
UMA1019AM
Product specification
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD VCC VCC-VDD Vn V2, 3 VGND Ptot Tstg Tamb Tj HANDLING digital supply voltage analog supply voltage difference in voltage between VCC and VDD voltage at pins 1, 6, 8, 9, 11 to 14 and 20 voltage at pins 2 and 3 difference in voltage between AGND and DGND (these pins should be connected together) total power dissipation storage temperature operating ambient temperature maximum junction temperature PARAMETER MIN. -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 - -55 -30 -
UMA1019AM
MAX. +5.5 +5.5 +5.5 VDD + 0.3 VCC + 0.3 +0.3 150 +125 +85 95 V V V V V V
UNIT
mW C C C
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient in free air VALUE 120 UNIT K/W
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Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
CHARACTERISTICS VDD1 = VDD2 = VDD3 = 2.7 to 5.5 V; VCC = 2.7 to 5.5 V; Tamb = 25 C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. - - 9 0.4 12 TYP.
UMA1019AM
MAX.
UNIT
Supply; pins 4, 5 and 18 VDD VCC IDD ICC ICCPD, IDDPD digital supply voltage analog supply voltage synthesizer digital supply current charge pumps analog supply current current in power-down mode per supply VDD1 = VDD2 = VDD3 VCC VDD VDD = 5.5 V VCC = 5.5 V; Rext =12 k logic levels 0 or VDD 2.7 2.7 - - - 5.5 5.5 11 1.0 50 V V mA mA A
RF main divider input; pin 6 fVCO V6(rms) ZI CI Rm fPCmax fPCmin RF input frequency AC-coupled input signal level (RMS value) input impedance (real part) typical pin input capacitance main divider ratio maximum phase comparator frequency minimum phase comparator frequency Rs = 50 fVCO = 1.7 GHz indicative, not tested 1000 100 - - 512 - - 1500 - 300 2 - 2000 10 1700 500 - - 131071 - - kHz kHz MHz mV pF
Crystal reference divider input; pin 8 fXTAL V8(rms) ZI CI Rr Rext V14 IOcp Imatch ILcp Vcp crystal reference input frequency sinusoidal input signal level (RMS value) input impedance (real part) typical pin input capacitance reference divider ratio 3 5 MHz < fXTAL < 40 MHz 50 3 MHz < fXTAL < 40 MHz 100 fXTAL = 30 MHz indicative, not tested - - 8 - - - 2 2 - - 1.15 - 5 1 - 40 500 500 - - 2047 MHz mV mV k pF
Charge pump current setting resistor input; pin 14 external resistor from pin 14 to ground regulated voltage at pin 14 Rext = 12 k 12 - -25 Vcp in range Vcp =
1 V 2 CC
60 - +25 - +5 VCC - 0.4
k V
Charge pump outputs; pins 3 and 2; Rext = 12 k charge pump output current error sink-to-source current matching charge pump off leakage current charge pump voltage compliance % % nA V - -5 0.4
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Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
SYMBOL PARAMETER CONDITIONS MIN. - - - 2 - TYP.
UMA1019AM
MAX.
UNIT
Interface logic input signal levels; pins 13, 12, 11 and 1 VIH VIL Ibias CI VOL HIGH level input voltage LOW level input voltage input bias current input capacitance logic 1 or logic 0 indicative, not tested 0.7VDD -0.3 -5 - - VDD + 0.3 0.3VDD +5 - V V A pF
Lock detect output signal; pin 20 (open-drain output) LOW level output voltage Isink = 0.4 mA 0.4 V
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Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
SERIAL BUS TIMING CHARACTERISTICS VDD = VCC = 3 V; Tamb = 25 C; unless otherwise specified. SYMBOL Serial programming clock; CLK tr tf Tcy tSTART tEND tW tSU;E tSU;DAT tHD;DAT Note input rise time input fall time clock period - - 100 10 10 - - - - - - - PARAMETER MIN. TYP.
UMA1019AM
MAX.
UNIT
40 40 - - - - - - -
ns ns ns
Enable programming; E delay to rising clock edge delay from last falling clock edge minimum inactive pulse width enable set-up time to next clock edge 40 -20 4000(1) 20 ns ns ns ns
Register serial input data; DATA input data to clock set-up time input data to clock hold time 20 20 ns ns
1. The minimum pulse width (tW) can be smaller than 4 s provided all the following conditions are satisfied: 512 a) Main divider input frequency f VCO > --------tW 3 b) Reference divider input frequency f XTAL > ----tW
Fig.3 Serial bus timing diagram.
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Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
APPLICATION INFORMATION
UMA1019AM
Fig.4 Typical application block diagram.
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1995 Jul 07 Philips Semiconductors
Low-voltage frequency synthesizer for radio telephones
Fig.5 Typical test and application diagram.
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UMA1019AM
Product specification
Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
PACKAGE OUTLINE SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm
UMA1019AM
SOT266-1
D
E
A X
c y HE vM A
Z
20
11
Q A2 pin 1 index A1 (A 3) Lp L A
1
e bp
10
detail X wM
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.5 A1 0.15 0 A2 1.4 1.2 A3 0.25 bp 0.32 0.20 c 0.20 0.13 D (1) 6.6 6.4 E (1) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1.0 Lp 0.75 0.45 Q 0.65 0.45 v 0.2 w 0.13 y 0.1 Z (1) 0.48 0.18 10 0o
o
Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT266-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 90-04-05 95-02-25
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Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SO and SSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering SO Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. SSOP
UMA1019AM
Wave soldering is not recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. If wave soldering cannot be avoided, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions, only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). METHOD (SO AND SSOP) During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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Philips Semiconductors
Product specification
Low-voltage frequency synthesizer for radio telephones
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
UMA1019AM
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
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Philips Semiconductors - a worldwide company
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Internet: http://www.semiconductors.philips.com/ps/ For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 (from 10-10-1995: +31-40-2724825) SCD41 (c) Philips Electronics N.V. 1995
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
413061/1500/02/pp16 Document order number: Date of release: 1995 Jul 07 9397 750 00198

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